Hello, I’m trying to debug one of the example program and the Pathfinder Console shows the warning while flashing to IP core: “Cyclone IV E information is incomplete. The ISP clamp functionality will be disabled”
Will this warning has any effect on flashing the program successfully? If yes, then where can I get option of enabling ISP clamp?
No, you have flashed the bitstream file successfully.
Do you have any problem with debugging the example? Can you debug the sample after flashing the bitstream on your hardware?
Hi @xnhan,
Yes I can Debug RISCV application on hardware. I also get OpenOCD messages displayed in the Console view, showing that the RISC-V core is being examined. And I could able to add new
breakpoints, viewing and changing variable values, checking the register values and so on.
But I wonder what my terminal view should show at this point of time? Because I’m getting the terminal view as shown in below picture.
When I launch RISCV application on hardware my console view shows as below and terminal view remains as mentioned in above attachment without displaying the output.
What might be the cause for the JTAG clock speed issue?
Also, when I press KEY0 after the output displaying on the terminal, again I’m ending up with same message as “OpenOCD… try reducing JTAG clock speed”.
Why is that so?
When you press KEY0, the board is reset but OpenOCD on the host PC is still running. So it causes timeout when OpenOCD tries to read the dmstatus signal from the board (aji_openocd/riscv-013.c at main · intel/aji_openocd · GitHub), then the error “OpenOCD… try reducing JTAG clock speed” is logged.
To start another debug/run session, you should terminate the current session.
To terminate current session: Open Window → Show View → Other → Debug → Debug
then right-click on the session → Terminate and Remove
Now, you can press KEY0 and start another debug/run session